1. Field of the Invention
This invention relates to a semiconductor device containing a complementary MOS (CMOS) element and a method of manufacturing the semiconductor device.
2. Description of the Related Art
Conventionally, a known gate electrode of MOS element is a polycide gate electrode in a laminated structure composed of at least two layers, i.e. a polysilicon layer and a refractory metal silicide layer. In order to meet with much higher integration of IC elements in recent years, attempt have been made to reduce MOS element electrodes in thickness. For example, in a device structure according to 0.5 .mu.m rule, it is required that gate electrodes should have a thickness of less than about 3000 angstrom.
The present inventors have observed that the thickness of the gate electrodes, and the polysilicon layer in particular, was inadvertently reduced due to heat treatment in the semiconductor device manufacturing process after formation of the gate electrodes. This reduction of the thickness of the polysilicon layer increases the stress on the gate oxide film or causes the metal of the silicide layer to penetrate into the gate oxide film, thus breaking the gate oxide film or deteriorating its characteristics.